Flopz browser edition | scriptable assembler for ARM, PPC VLE, RISCV and other architectures


                    
                

                    
                

                    
                

                
{ "interpreter": "./micropython/micropython.mjs", "files": { "./flopz/__init__.py": "./flopz/__init__.py", "./flopz/bitstring.py": "./flopz/bitstring.py", "./flopz/arch/__init__.py": "./flopz/arch/__init__.py", "./flopz/arch/architecture.py": "./flopz/arch/architecture.py", "./flopz/arch/auto_instruction.py": "./flopz/arch/auto_instruction.py", "./flopz/arch/exceptions.py": "./flopz/arch/exceptions.py", "./flopz/arch/instruction.py": "./flopz/arch/instruction.py", "./flopz/arch/operands.py": "./flopz/arch/operands.py", "./flopz/arch/register.py": "./flopz/arch/register.py", "./flopz/arch/arm/__init__.py": "./flopz/arch/arm/__init__.py", "./flopz/arch/arm/arm_generic_arch.py": "./flopz/arch/arm/arm_generic_arch.py", "./flopz/arch/arm/thumb/__init__.py": "./flopz/arch/arm/thumb/__init__.py", "./flopz/arch/arm/thumb/auto_instructions.py": "./flopz/arch/arm/thumb/auto_instructions.py", "./flopz/arch/arm/thumb/instructions.py": "./flopz/arch/arm/thumb/instructions.py", "./flopz/arch/arm/thumb/stm32F407.py": "./flopz/arch/arm/thumb/stm32F407.py", "./flopz/arch/ia32/__init__.py": "./flopz/arch/ia32/__init__.py", "./flopz/arch/ia32/addressing.py": "./flopz/arch/ia32/addressing.py", "./flopz/arch/ia32/auto_instructions.py": "./flopz/arch/ia32/auto_instructions.py", "./flopz/arch/ia32/conditionals.py": "./flopz/arch/ia32/conditionals.py", "./flopz/arch/ia32/ia32_generic_arch.py": "./flopz/arch/ia32/ia32_generic_arch.py", "./flopz/arch/ia32/instruction_components.py": "./flopz/arch/ia32/instruction_components.py", "./flopz/arch/ia32/instructions.py": "./flopz/arch/ia32/instructions.py", "./flopz/arch/ia32/modes.py": "./flopz/arch/ia32/modes.py", "./flopz/arch/ppc/__init__.py": "./flopz/arch/ppc/__init__.py", "./flopz/arch/ppc/ppc_generic_arch.py": "./flopz/arch/ppc/ppc_generic_arch.py", "./flopz/arch/ppc/vle/__init__.py": "./flopz/arch/ppc/vle/__init__.py", "./flopz/arch/ppc/vle/auto_instructions.py": "./flopz/arch/ppc/vle/auto_instructions.py", "./flopz/arch/ppc/vle/e200z0.py": "./flopz/arch/ppc/vle/e200z0.py", "./flopz/arch/ppc/vle/instructions.py": "./flopz/arch/ppc/vle/instructions.py", "./flopz/arch/ppc/vle/registers.py": "./flopz/arch/ppc/vle/registers.py", "./flopz/arch/ppc/vle/vle.py": "./flopz/arch/ppc/vle/vle.py", "./flopz/arch/riscv/__init__.py": "./flopz/arch/riscv/__init__.py", "./flopz/arch/riscv/registers.py": "./flopz/arch/riscv/registers.py", "./flopz/arch/riscv/riscv_generic_arch.py": "./flopz/arch/riscv/riscv_generic_arch.py", "./flopz/arch/riscv/rv32c/__init__.py": "./flopz/arch/riscv/rv32c/__init__.py", "./flopz/arch/riscv/rv32c/instructions.py": "./flopz/arch/riscv/rv32c/instructions.py", "./flopz/arch/riscv/rv32i/__init__.py": "./flopz/arch/riscv/rv32i/__init__.py", "./flopz/arch/riscv/rv32i/instructions.py": "./flopz/arch/riscv/rv32i/instructions.py", "./flopz/arch/riscv/rv32i/rv32i_arch.py": "./flopz/arch/riscv/rv32i/rv32i_arch.py", "./flopz/core/__init__.py": "./flopz/core/__init__.py", "./flopz/core/addressable_object.py": "./flopz/core/addressable_object.py", "./flopz/core/assembler.py": "./flopz/core/assembler.py", "./flopz/core/function.py": "./flopz/core/function.py", "./flopz/core/label.py": "./flopz/core/label.py", "./flopz/core/module.py": "./flopz/core/module.py", "./flopz/core/shellcode.py": "./flopz/core/shellcode.py", "./flopz/core/target.py": "./flopz/core/target.py", "./flopz/util/__init__.py": "./flopz/util/__init__.py", "./flopz/util/integer_representation.py": "./flopz/util/integer_representation.py", "./flopz/util/parsing.py": "./flopz/util/parsing.py", "./bitstring.py": "./bitstring.py", "./typing.py": "./typing.py", "./enum.py": "./enum.py" } }